|
ISCRIZIONE |
Multi-processor system-on-chips: key challenges
Dr. Marcello Coppola
Research and Innovation for the Home Entertainment and Display (HED) product group, STMicroelectronics, Grenoble, France
20 hours, 5 credits
July 11 - July 15, 2011
Dipartimento di Ingegneria dell'Informazione: Elettronica, Informatica, Telecomunicazioni, via Caruso, meeting room, ground floor
Contacts: Prof. Luca Fanucci
Aims
This series of lessons will introduce students to the hardware and software architecture of System-on-Chip (SoC). The goals is to provide a foundation about contemporary SoC organizations covering early architectures, processors, network oriented interconnects, memory hierarchies and case studies.
The lessons start with a discussion on the basic concepts on multi-core systems on chip and several guidelines are given for the design of large and complex SoC, with examples from the consumer and mobile market. We will present the organization of modern SoC pointing out on the key hardware components: processors, memory, network on chip as well as the embedded software demonstrating the key challenges and ideas (e.g., memory hierarchy, caching, virtual memory, network topology, etc.) that influence their design.
Syllabus
- Definitions and background
- Embedded market
- Multicore systems-on-a-chip
- Symmetric multiprocessing
- Asymmetric multiprocessing
- Network on chip
- Memory issues
- Software trends
- Conclusion
