---

clk_0

clock_source v13.0

Parameters clockFrequency 50000000 clockFrequencyKnown true inputClockFrequency 0 resetSynchronousEdges NONE deviceFamily UNKNOWN generateLegacySim false

  

Software Assignments (none)

---

Onchip_Memory

altera_avalon_onchip_memory2 v13.0.1.99.2

Parameters allowInSystemMemoryContentEditor false blockType AUTO dataWidth 32 dualPort false initMemContent true initializationFileName Onchip_Memory instanceID NONE memorySize 16384 readDuringWriteMode DONT_CARE simAllowMRAMContentsFile false simMemInitOnlyFilename 0 singleClockOperation false slave1Latency 1 slave2Latency 1 useNonDefaultInitFile false useShallowMemBlocks false writable true autoInitializationFileName Video_System_Onchip_Memory deviceFamily CYCLONEII deviceFeatures ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 0 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 1 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 0 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 1 HAS_JITTER_SUPPORT 0 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 1 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 0 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 0 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 1 HAS_SPLIT_IO_SUPPORT 0 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 0 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 1 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 1 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 1 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 1 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 1 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 0 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 0 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 0 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0 derived_set_addr_width 12 derived_gui_ram_block_type Automatic derived_is_hardcopy false derived_init_file_name Video_System_Onchip_Memory.hex generateLegacySim false

  

Software Assignments ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR 0 ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE 0 CONTENTS_INFO "" DUAL_PORT 0 GUI_RAM_BLOCK_TYPE AUTO INIT_CONTENTS_FILE Video_System_Onchip_Memory INIT_MEM_CONTENT 1 INSTANCE_ID NONE NON_DEFAULT_INIT_FILE_ENABLED 0 RAM_BLOCK_TYPE AUTO READ_DURING_WRITE_MODE DONT_CARE SINGLE_CLOCK_OP 0 SIZE_MULTIPLE 1 SIZE_VALUE 16384 WRITABLE 1

---

Dual_Clock_FIFO

altera_up_avalon_video_dual_clock_buffer v13.0

Parameters color_bits 10 color_planes 3 AUTO_CLOCK_STREAM_IN_CLOCK_RATE 50000000 AUTO_CLOCK_STREAM_OUT_CLOCK_RATE 25000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

---

Pixel_Buffer

altera_up_avalon_sram v13.0

Parameters board DE2 pixel_buffer true AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

---

Pixel_Buffer_DMA

altera_up_avalon_video_pixel_buffer_dma v13.0

Parameters addr_mode X-Y start_address 0 back_start_address 0 image_width 320 image_height 240 color_space 16-bit RGB AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

---

Pixel_RGB_Resampler

altera_up_avalon_video_rgb_resampler v13.0

Parameters input_type 16-bit RGB output_type 30-bit RGB alpha 255 input_bits 16 input_planes 1 output_bits 10 output_planes 3 AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

---

Pixel_Scaler

altera_up_avalon_video_scaler v13.0

Parameters width_scaling 2 height_scaling 2 width_in 320 height_in 240 width_out 640 height_out 480 color_bits 10 color_planes 3 AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

---

VGA_Controller

altera_up_avalon_video_vga_controller v13.0

Parameters board DE2 device VGA Connector underflow_flag false AUTO_CLOCK_RESET_CLOCK_RATE 25000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

---

Video_In_Decoder

altera_up_avalon_video_decoder v13.0

Parameters video_source On-board Video In (NTSC or PAL) AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

---

Chroma_Resampler

altera_up_avalon_video_chroma_resampler v13.0

Parameters input_type YCrCb 422 output_type YCrCb 444 input_bits 8 input_planes 2 output_bits 8 output_planes 3 AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

---

Color_Space_Converter

altera_up_avalon_video_csc v13.0

Parameters csc_type 444 YCrCb to 24-bit RGB input_type 444 YCrCb output_type 24-bit RGB input_bits 8 input_planes 3 output_bits 8 output_planes 3 AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

---

Video_RGB_Resampler

altera_up_avalon_video_rgb_resampler v13.0

Parameters input_type 24-bit RGB output_type 16-bit RGB alpha 255 input_bits 8 input_planes 3 output_bits 16 output_planes 1 AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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Video_Clipper

altera_up_avalon_video_clipper v13.0

Parameters width_in 720 height_in 244 drop_left 40 drop_right 40 drop_top 2 drop_bottom 2 add_left 0 add_right 0 add_top 0 add_bottom 0 add_value_plane_1 0 add_value_plane_2 0 add_value_plane_3 0 add_value_plane_4 0 color_bits 16 color_planes 1 AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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Video_Scaler

altera_up_avalon_video_scaler v13.0

Parameters width_scaling 0.5 height_scaling 1 width_in 640 height_in 240 width_out 320 height_out 240 color_bits 16 color_planes 1 AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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Video_DMA

altera_up_avalon_video_dma_controller v13.0

Parameters mode From Stream to Memory addr_mode X-Y start_address 0 back_start_address 0 width 320 height 240 color_bits 16 color_planes 1 dma_enabled true AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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AV_Config

altera_up_avalon_audio_and_video_config v13.0

Parameters device On-Board Peripherals board DE2 eai true audio_in Microphone to ADC dac_enable true mic_bypass false line_in_bypass false mic_attenuation -6dB data_format Left Justified bit_length 24 sampling_rate 48 kHz bosr 250fs/256fs sr_register 0 video_format NTSC d5m_resolution 2592 x 1944 exposure false AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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CPU

altera_nios2_qsys v13.0

Parameters setting_showUnpublishedSettings false setting_showInternalSettings false setting_preciseSlaveAccessErrorException false setting_preciseIllegalMemAccessException false setting_preciseDivisionErrorException false setting_performanceCounter false setting_illegalMemAccessDetection false setting_illegalInstructionsTrap false setting_fullWaveformSignals false setting_extraExceptionInfo false setting_exportPCB false setting_debugSimGen false setting_clearXBitsLDNonBypass true setting_bit31BypassDCache true setting_bigEndian false setting_export_large_RAMs false setting_asic_enabled false setting_asic_synopsys_translate_on_off false setting_oci_export_jtag_signals false setting_bhtIndexPcOnly false setting_avalonDebugPortPresent false setting_alwaysEncrypt true setting_allowFullAddressRange false setting_activateTrace true setting_activateTestEndChecker false setting_activateMonitors true setting_activateModelChecker false setting_HDLSimCachesCleared true setting_HBreakTest false muldiv_divider false mpu_useLimit false mpu_enabled false mmu_enabled false mmu_autoAssignTlbPtrSz true manuallyAssignCpuID false debug_triggerArming true debug_embeddedPLL true debug_debugReqSignals false debug_assignJtagInstanceID false dcache_omitDataMaster false cpuReset false is_hardcopy_compatible false setting_shadowRegisterSets 0 mpu_numOfInstRegion 8 mpu_numOfDataRegion 8 mmu_TLBMissExcOffset 0 debug_jtagInstanceID 0 resetOffset 0 exceptionOffset 32 cpuID 0 cpuID_stored 0 breakOffset 32 userDefinedSettings resetSlave Onchip_Memory.s1 mmu_TLBMissExcSlave exceptionSlave Onchip_Memory.s1 breakSlave CPU.jtag_debug_module setting_perfCounterWidth 32 setting_interruptControllerType Internal setting_branchPredictionType Automatic setting_bhtPtrSz 8 muldiv_multiplierType EmbeddedMulFast mpu_minInstRegionSize 12 mpu_minDataRegionSize 12 mmu_uitlbNumEntries 4 mmu_udtlbNumEntries 6 mmu_tlbPtrSz 7 mmu_tlbNumWays 16 mmu_processIDNumBits 8 impl Tiny icache_size 4096 icache_tagramBlockType Automatic icache_ramBlockType Automatic icache_numTCIM 0 icache_burstType None dcache_bursts false dcache_victim_buf_impl ram debug_level Level1 debug_OCIOnchipTrace _128 dcache_size 2048 dcache_tagramBlockType Automatic dcache_ramBlockType Automatic dcache_numTCDM 0 dcache_lineSize 32 setting_exportvectors false setting_ecc_present false regfile_ramBlockType Automatic ocimem_ramBlockType Automatic mmu_ramBlockType Automatic bht_ramBlockType Automatic resetAbsoluteAddr 540672 exceptionAbsoluteAddr 540704 breakAbsoluteAddr 559136 mmu_TLBMissExcAbsAddr 0 dcache_bursts_derived false dcache_size_derived 2048 dcache_lineSize_derived 32 translate_on "synthesis translate_on" translate_off "synthesis translate_off" instAddrWidth 20 dataAddrWidth 21 tightlyCoupledDataMaster0AddrWidth 1 tightlyCoupledDataMaster1AddrWidth 1 tightlyCoupledDataMaster2AddrWidth 1 tightlyCoupledDataMaster3AddrWidth 1 tightlyCoupledInstructionMaster0AddrWidth 1 tightlyCoupledInstructionMaster1AddrWidth 1 tightlyCoupledInstructionMaster2AddrWidth 1 tightlyCoupledInstructionMaster3AddrWidth 1 instSlaveMapParam <address-map><slave name='Onchip_Memory.s1' start='0x84000' end='0x88000' /><slave name='CPU.jtag_debug_module' start='0x88800' end='0x89000' /></address-map> dataSlaveMapParam <address-map><slave name='Pixel_Buffer.avalon_sram_slave' start='0x0' end='0x80000' /><slave name='Onchip_Memory.s1' start='0x84000' end='0x88000' /><slave name='CPU.jtag_debug_module' start='0x88800' end='0x89000' /><slave name='AV_Config.avalon_av_config_slave' start='0x89000' end='0x89010' /><slave name='Video_DMA.avalon_dma_control_slave' start='0x89010' end='0x89020' /><slave name='Pixel_Buffer_DMA.avalon_control_slave' start='0x89020' end='0x89030' /><slave name='Video_character_buffer.avalon_char_control_slave' start='0x90000' end='0x90008' /><slave name='Video_character_buffer.avalon_char_buffer_slave' start='0x92000' end='0x94000' /><slave name='sysid.control_slave' start='0x94000' end='0x94008' /><slave name='Push_buttons.avalon_parallel_port_slave' start='0x100000' end='0x100010' /><slave name='green_leds.avalon_parallel_port_slave' start='0x100010' end='0x100020' /></address-map> clockFrequency 50000000 deviceFamilyName CYCLONEII internalIrqMaskSystemInfo 0 customInstSlavesSystemInfo <info/> deviceFeaturesSystemInfo ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 0 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 1 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 0 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 1 HAS_JITTER_SUPPORT 0 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 1 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 0 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 0 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 1 HAS_SPLIT_IO_SUPPORT 0 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 0 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 1 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 1 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 1 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 1 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 1 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 0 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 0 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 0 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0 tightlyCoupledDataMaster0MapParam tightlyCoupledDataMaster1MapParam tightlyCoupledDataMaster2MapParam tightlyCoupledDataMaster3MapParam tightlyCoupledInstructionMaster0MapParam tightlyCoupledInstructionMaster1MapParam tightlyCoupledInstructionMaster2MapParam tightlyCoupledInstructionMaster3MapParam deviceFamily UNKNOWN generateLegacySim false

  

Software Assignments BIG_ENDIAN 0 BREAK_ADDR 0x00088820 CPU_FREQ 50000000u CPU_ID_SIZE 1 CPU_ID_VALUE 0x00000000 CPU_IMPLEMENTATION "tiny" DATA_ADDR_WIDTH 21 DCACHE_LINE_SIZE 0 DCACHE_LINE_SIZE_LOG2 0 DCACHE_SIZE 0 EXCEPTION_ADDR 0x00084020 FLUSHDA_SUPPORTED HARDWARE_DIVIDE_PRESENT 0 HARDWARE_MULTIPLY_PRESENT 0 HARDWARE_MULX_PRESENT 0 HAS_DEBUG_CORE 1 HAS_DEBUG_STUB HAS_JMPI_INSTRUCTION ICACHE_LINE_SIZE 0 ICACHE_LINE_SIZE_LOG2 0 ICACHE_SIZE 0 INST_ADDR_WIDTH 20 RESET_ADDR 0x00084000

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Clock_Signals

altera_up_clocks v13.0

Parameters board DE2 sys_clk_freq 50 sdram_clk false vga_clk true audio_clk false audio_clk_freq 12.288 AUTO_CLK_IN_PRIMARY_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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Video_character_buffer

altera_up_avalon_video_character_buffer_with_dma v13.0

Parameters vga_device On-board VGA DAC enable_transparency true color_bits 1-bit resolution 80 x 60 AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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video_alpha_blender

altera_up_avalon_video_alpha_blender v13.0

Parameters mode Simple AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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Push_buttons

altera_up_avalon_parallel_port v13.0

Parameters board DE2 custom_port false preset Pushbuttons leds Green sevensegs 3 to 0 gpio GPIO 0 (JP1) DW 4 direction Input only custom_DW 32 custom_direction Input only capture true edge Falling irq false irq_type Edge AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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green_leds

altera_up_avalon_parallel_port v13.0

Parameters board DE2 custom_port false preset LEDs leds Green sevensegs 3 to 0 gpio GPIO 0 (JP1) DW 9 direction Output only custom_DW 32 custom_direction Input only capture false edge Rising irq false irq_type Edge AUTO_CLOCK_RESET_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments (none)

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sysid

altera_avalon_sysid_qsys v13.0

Parameters id 16 timestamp 1492878548 AUTO_CLK_CLOCK_RATE 50000000 AUTO_DEVICE_FAMILY CYCLONEII deviceFamily Cyclone II generateLegacySim false

  

Software Assignments ID 16 TIMESTAMP 1492878548