URSI ISSSE'98
International Symposium on Signals, Systems, and Electronics
29 September-02 October 1998, Palazzo dei Congressi, PISA, Italy


SESSION FV1
Modelling and Design Techniques
Organizer/Chairman: G. Gielen,
Katholieke Universiteit Leuven, Belgium

FV1.1
G. G. E. Gielen (Katholieke Universiteit Leuven, Belgium), " System-level design tools for RF communication ICs "

FV1.2
M. C. Currás-Francos, M. Fernández-Barciela, E. Sánchez, Y. Campos-Roca (Universidad de Vigo, Spain), P. J. Tasker, S. S. O'Keefe (University of Wales Cardiff, UK), G. D. Edwards, W. A. Phillips (GEC-Marconi, UK), "Accurate HEMT Model Extraction and Validation in Class A and B bias points using a Full Two-Port Large Signal On-Wafer Measurement System"

FV1.3
K. Horio, T. Yamada (Shibaura Institute of Technology, Japan), " Computer-Aided Analysis of Surface-State Effects on Gate-Lag Phenomena in GaAs MESFETs "

FV1.4
V. A. Vaishampayan (AT&T Labs, USA), " High Quality A/D Conversion Using Single-Bit Quantizers: A Novel Approach based on Generalized Frequency Modulation "


For further information, please contact:

vitetta@iet.unipi.it

Back to the Conference Home Page


Last updated August 27, 1998