URSI ISSSE'98
International Symposium on Signals, Systems, and Electronics
29 September-02 October 1998, Palazzo dei Congressi, PISA, Italy


SESSION TV1
Data communication/processing circuits
Organizer/Chairman
: M. Engels, IMEC VSDM, Belgium

TV1.1
M. Engels, W. Eberle, B. Gyselinckx (IMEC, Belgium), "Design of a 100 Mbits/s Wireless LAN"

TV1.2
S. He, M. Torkelson (Lund University, Swden), "Designing Pipeline FFT Processor for OFDM (de)Modulation "

TV1.3
P. Lettieri, A. Boulis, M. B. Srivasatva (University of California Los Angeles, USA), "Design of Adaptive Wireless Terminals "

TV1.4
L. Philips (Sirius Communications, Belgium), "Highly Integrated Chips for Commercial CDMA-based Satcom"

TV1.5
A. Chiementi, M. Lucenteforte (CNR, Italy), D. Pau, R. Sannino (ST Microelectronics, Italy), "A Novel Co/Decoding Scheme to Reduce Memory in MPEG2 MP@ML Decoder"

TV1.6
L. Petit, J.-D. Legat (Université Catholique de Louvain, Belgium), " A Low-Cost VLIW DSP Architecture for Communication Equipment"

TV1.7
G. Franceschetti, M. Tesauro (IRECE, Italy), A. G. M. Strollo, E. Napoli, C. Cimino, P. Spirito, A. Mazzeo, N. Mazzocca (University of Napoli, Italy), "A VLSI Architecture for Real Time Processing of One-bit Coded SAR Signals"


For further information, please contact:

vitetta@iet.unipi.it

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Last updated August 27, 1998